#define TIMx           TIM2
#define TIMy           TIM3


void TIM_Config(void)
{

  RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
  RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;

 
  TIMx->CR2 |= TIM_CR2_MMS_0;                       // MMS = 001 Enable - the Counter enable signal, CNT_EN, is used as trigger output (TRGO) 
  TIMy->SMCR |= TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0;    // SMS = 101 Gated Mode
  TIMy->SMCR |= TIM_SMCR_TS_0;                      //  TS = 001 TIM2_Master TIM3_Slave
//  TIMy->SMCR |= TIM_SMCR_MSM;
 
  TIMx->EGR |= TIM_EGR_UG;
  TIMy->EGR |= TIM_EGR_UG;
 
  TIMy->CR1 |= TIM_CR1_CEN;
  TIMx->CR1 |= TIM_CR1_CEN;
}


int main(void)
{
SysTick_Config(SystemCoreClock/1000);   // Setup SysTick Timer  (1ms)
   
TIM_Config();
Delay_mS(100);
   
TIMx->CR1 &= ~TIM_CR1_CEN;   
   
__NOP();

TIMx->CR1 |= TIM_CR1_CEN;   
Delay_mS(100);
   
TIMx->CR1 &= ~TIM_CR1_CEN;   
   
__NOP();   
   
while(1);

}